Product Overview

The VSG3ST6 is an enhanced simplex High-Speed STP macro with data transfer capabilities of up-to 6.25Gbps. It includes a Standard ARM HS-STP simplex interface. In addition, on the same footprint using Gigacomís technology, it can include a standard JTAG interface.

Typical Applications

  • Standard ARM HS-STP v5.2
  • High-Speed Debug/Test data transfer
  • Real-Time monitoring of on-chip signals/bus
  • Silicon Debug
  • (Optional) Standard JTAG Interface


  • Standards Compliance
    • ARM HS-STP v5.2
    • ARM Coresight DDI 0314H
    • Xilinx Aurora 8b/10b v2.2
    • IEEE 1149.1
  • High-Speed Data Transfer
    • Up-to 6.25Gbps per lane
    • Up-to 8 lanes, for a combined total of 50Gbps
    • Low Power Automatic shut-off when not enabled ensures minimum power consumption
  • Simple configuration interface
    • Small register configuration space
    • Simple interface, can be easily connected to an standard APB bus, or similar
    • Minimal setup, with automatic start-up when reset is de-asserted
  • On-Chip IO ring compatibility
    • Designed as an IO-ring component
  • Small footprint
  • Wire-Bond and Flip-Chip compatible
  • Clocking
    • Flexible clocking options, including internal and external, direct or crystal-based
  • Optional Features
    • JTAG Interface
    • Embedded TAP controller
  • Extensive Test and Debug Features
    • Scan
    • JTAG
    • Serial Debug Access


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